Implementación de filtros en los grados de Ingeniería usando el procesador Nios II

Javier Vicente Sáez, Begoña García Zapirain

Abstract


For engineering studies related with signal processing algorithms, filters are probably the resource more used, so a lot of the time used in processing the whole algorithm is wasted in filters execution. Reducing the processing time of the filters the processing time of the whole algorithms can be significantly reduced. The DSPs are more easy to use than the FPGAs, because write a program is easier than describe hardware. On the other hand the FPGAs have more capability of parallel processing than the DSPs. It will be great to own a system that have the better of these two technologies, very easy to develop algorithms and a high performance due of a high parallel processing possibility. This is what is presented in this work, a reconfigurable unit in witch can be implemented large filter structures controlled by a Nios II processor.

Index Terms - DSP, filters, FPGA, real-time.


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This work is licensed under a Creative Commons Attribution 3.0 License.

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ISSN 2317-4145

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